北京兆芯电子科技有限公司前身是威盛电子（中国）有限公司在北京的核心研发团队，现是上海兆芯集成电路有限公司在北京的全资子公司，目前员工人数近400名，其中超过90%为硕士以上学历。　　　　
上海兆芯是一家成立于2013年4月的国资控股企业，由上海市国资委下属上海联和投资有限公司和威盛电子股份有限公司合资成立，注册资本2.5亿美元。兆芯现有员工总数近1000人，总部位于上海张江，在北京、武汉、中国□□、美国都设有分支机构。　　　　
兆芯立足于处理器芯片等集成电路的开发和设计，兼具CPU、GPU和芯片组等方面的设计能力优势，旨在为业界提供高性能、高安全性、低功耗、低成本的芯片及配套解决方案。　　　　
兆芯现采用无工厂生产模式，使用世界领先的芯片生产工艺研发各类智能终端处理器芯片，目标成为中国核心处理器芯片的首选供应商。　　　　
　　　
简历接收邮箱：hrbj01@zhaoxin.com，简历格式：姓名+应聘职位　
ASIC Design Engineer(X86/SOC) 【Responsibilities】
1. X86 /Chipset/SOC Design development
2. Timing verification and logic / physical synthesis, formal verification, etc.
3. System verification and debugging and performance analyzing
4. Functional model development
5. Function test vector development and debugging
6. Emulation verification

【Requirements】
1. MS/PHD in microelectronic, computer science or related
2. Knowledge of digital circuit design, computer system architecture
3. Familiar with Verilog/VHDL, and behavior modeling
4. Experience with Design tools such as simulator, logic synthesis
5. Strong problem solving and debugging skills; good English language skill
6. Knowledge of X86 architecture is a plus
7. Knowledge of C/C++ is a plus
ASIC Verification Engineer (X86/SOC) 【Responsibilities】

1.ASIC design verification methodology research
2.Develop and maintain verification system
3.Own ASIC project verification. Build system, debug design, develop vector, analyze coverage, develop function model and monitor


【Requirements】

1.MS/PHD in microelectronic, computer science or related
2.Knowledge of digital circuit design, computer system architecture
3.Familiar with Verilog/VHDL, SystemVerilog and C/C++
4.Experience with simulator such as NC/VCS
5.Good team work; strong problem solving and debugging skills; good English communication skill
6.Knowledge of Unix platform，csh，perl and tcl prgramming is a plus
7.Knowledge of X86 architecture is a plus
8.Knowledge of UVM system is a plus
CPU Architecture Engineer 【Responsibilities】
1.X86 micro-architecture development
2.Developing the design and architecture of a complex microprocessor in deep
sub-micron process technology
3.Developing the CPU microarchitecture based on function/performance/power requirements
4.Improving the CPU architecture for optimized performance and power　　　　　
5.CPU performance/power evaluation
6.CPU function/performance modeling

【Requirements】
1. MS/PHD in microelectronic, computer science or related
2.Complete understanding of advanced CPU architecture and design techniques
3.Significant experience and knowledge with CPU design and improvement
4.Good understanding of OS and other general software tools　　　　　　　　　　　　　　
5. Strong problem solving and debugging skills; good English language skill　　　　　　　　　　　　　　　　
6. Knowledge of C/C++ is a plus　　　　　　　　　　　
7. Knowledge of processor modeling is a plus